DSP Builder technology allows you to go from system definition and simulation using the industry-standard MathWorks Simulink tools to system implementation in a matter of minutes. The DSP Builder Signal Compiler block reads Simulink Model Files (.mdl) that are built using the DSP Builder and MegaCore® blocks and generates VHDL files and Tcl scripts for synthesis, hardware implementation, and simulation. Altera and MathWorks work in close collaboration to ensure that you get the price and performance benefits of Altera® FPGAs while leveraging Simulink, the industry-leading tool for model-based design from MathWorks.
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References in zbMATH (referenced in 4 articles )
Showing results 1 to 4 of 4.
- Muthuswamy, Bharathwaj; Banerjee, Santo: A route to chaos using FPGAs. Volume I. Experimental observations (2015)
- Pedroso, Marcelo Dias; Nascimento, Claudinor Bitencourt; Tusset, Angelo Marcelo; Dos Santos Kaster, Maurício: A hyperbolic tangent adaptive PID + LQR control applied to a step-down converter using poles placement design implemented in FPGA (2013)
- Wang, Zhonglin; Yao, Fuan; Li, Xiangfeng: Design and realization of a hyperchaotic system based on FPGA (2008)
- Darabiha, Ahmad; MacLean, W.James; Rose, Jonathan: Reconfigurable hardware implementation of a phase-correlation stereoalgorithm (2006) ioport