The SimpleScalar tool set, version 2.0. This document describes release 2.0 of the SimpleScalar tool set, a suite of free, publicly available simulation tools that offer both detailed and high-performance simulation of modern microprocessors. The new release offers more tools and capabilities, precompiled binaries, cleaner interfaces, better documentation, easier installation, improved portability, and higher performance. This paper contains a complete description of the tool set, including retrieval and installation instructions, a description of how to use the tools, a description of the target SimpleScalar architecture, and many details about the internals of the tools and how to customize them. With this guide, the tool set can be brought up and generating results in under an hour (on supported platforms).

This software is also peer reviewed by journal TOMS.

References in zbMATH (referenced in 54 articles )

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  1. Altenbernd, Peter; Gustafsson, Jan; Lisper, Björn; Stappert, Friedhelm: Early execution time-estimation through automatically generated timing models (2016)
  2. Dasari, Dakshina; Nelis, Vincent; Akesson, Benny: A framework for memory contention analysis in multi-core platforms (2016)
  3. Asăvoae, Mihail; Asăvoae, Irina Măriuca: On the modular integration of abstract semantics for WCET analysis (2014)
  4. Ding, Chen; Xiang, Xiaoya; Bao, Bin; Luo, Hao; Luo, Ying-Wei; Wang, Xiao-Lin: Performance metrics and models for shared cache (2014) ioport
  5. Liu, Peng; Fang, Lei; Huang, Michael C.: DEAM: decoupled, expressive, area-efficient metadata cache (2014) ioport
  6. Gupta, Saurabh; Xiang, Ping; Yang, Yi; Zhou, Huiyang: Locality principle revisited: a probability-based quantitative approach (2013) ioport
  7. He, Liqiang; Zhang, Guangyong; Jiang, Jingdong: GPU accelerated parallel branch prediction for multi/many-core processor simulation (2012) ioport
  8. Mittal, Shaily; Nitin: Memory map: a multiprocessor cache simulator (2012) ioport
  9. Xie, Zi-Chao; Tong, Dong; Huang, Ming-Kai; Shi, Qin-Qing; Cheng, Xu: SWIP prediction: complexity-effective indirect-branch prediction using pointers (2012) ioport
  10. Fensch, Christian; Cintra, Marcelo: An evaluation of an OS-based coherence scheme for tiled CMPs (2011) ioport
  11. Ma, An-Guo; Cheng, Yu; Xing, Zuo-Cheng: Accurate and simplified prediction of AVF for delay and energy efficient cache design (2011) ioport
  12. Silva-Filho, Abel G.; Cordeiro, Filipe R.; Araújo, Cristiano C.; Sarmento, Adriano; Gomes, Millena; Barros, Edna; Lima, Manoel E.: An ESL approach for energy consumption analysis of cache memories in soc platforms (2011) ioport
  13. Yao, Jun; Miwa, Shinobu; Shimada, Hajime; Tomita, Shinji: A fine-grained runtime power/performance optimization method for processors with adaptive pipeline depth (2011) ioport
  14. Zheng, Long; Dong, Mian-Xiong; Ota, Kaoru; Jin, Hai; Guo, Song; Ma, Jun: Energy efficiency of a multi-core processor by tag reduction (2011) ioport
  15. Li, Xiaobin; Gaudiot, Jean-Luc: Tolerating radiation-induced transient faults in modern processors (2010)
  16. Lv, Mingsong; Guan, Nan; Deng, Qingxu; Yu, Ge; Wang, Yi: Static worst-case execution time analysis of the $\mu$C/OS-II real-time kernel (2010) ioport
  17. Milidonis, Athanasios; Alachiotis, Nikolaos; Porpodas, Vasileios; Michail, Harris; Panagiotakopoulos, Georgios; Kakarountas, Athanasios P.; Goutis, Costas E.: Decoupled processors architecture for accelerating data intensive applications using scratch-pad memory hierarchy (2010) ioport
  18. Sun, Kai; Wang, Meng; Shao, Zili; Liu, Hui; Wei, Hongxing; Wang, Tianmiao: Design and synthesis of a multiprocessor system-on-chip architecture for real-time biomedical signal processing in gamma cameras (2010) ioport
  19. Suri, Tameesh; Aggarwal, Aneesh: Improving adaptability and per-core performance of many-core processors through reconfiguration (2010)
  20. Borodin, Demid; Juurlink, B.H.H. (Ben); Hamdioui, Said; Vassiliadis, Stamatis: Instruction-level fault tolerance configurability (2009) ioport

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