The Polychrony toolset, the Signal language and the SME environment have been designed at IRISA as a technology demonstrator for the research activities of the ESPRESSO project (2000-2012) and its academic or industrial partners. It is distributed and maintained by INRIA project-team TEA on the platform of the Polarsys Industry Working Group, project POP (Polychrony on Polarsys). Polychrony is an integrated development environment and technology demonstrator. It provides a unified model-driven environment to perform embedded system design exploration by using top-down and bottom-up design methodologies formally supported by design model transformations from specification to implementation and from synchrony to asynchrony.

References in zbMATH (referenced in 17 articles )

Showing results 1 to 17 of 17.
Sorted by year (citations)

  1. Jebali, Fatma; Lang, Frédéric; Mateescu, Radu: Formal modelling and verification of GALS systems using GRL and CADP (2016)
  2. Talpin, Jean-Pierre; Brandt, Jens; Gemünde, Mike; Schneider, Klaus; Shukla, Sandeep: Constructive polychronous systems (2013)
  3. Talpin, Jean-Pierre; Ouy, Julien; Gautier, Thierry; Besnard, Loïc; Le Guernic, Paul: Compositional design of isochronous systems (2012)
  4. Glouche, Yann; Le Guernic, Paul; Talpin, Jean-Pierre; Gautier, Thierry: A Boolean algebra of contracts for assume-guarantee reasoning (2010)
  5. Brunette, Christian; Talpin, Jean-Pierre; Gamatié, Abdoulaye; Gautier, Thierry: A metamodel for the design of polychronous systems (2009)
  6. Cansell, Dominique; Méry, Dominique; Proch, Cyril: System-on-chip design by proof-based refinement (2009)
  7. Ouy, Julien; Talpin, Jean-Pierre; Besnard, Loïc; Le Guernic, Paul: Separate compilation of polychronous specifications. (2008)
  8. Bertran, Miquel; Babot, Francesc; Climent, August: Formal sequentialization of distributed systems via program rewriting (2007)
  9. Bertran, Miquel; Babot, Francesc-Xavier; Climent, August: Formal sequentialization of distributed systems via program rewriting. (2007)
  10. Taubin, Alexander; Cortadella, Jordi; Lavagno, Luciano; Kondratyev, Alex; Peeters, Ad: Design automation of real life asynchronous devices and systems (2007)
  11. Carloni, Luca P.: The role of back-pressure in implementing latency-insensitive systems. (2006)
  12. Carloni, Luca P.; Sangiovanni-Vincentelli, Alberto L.: A framework for modeling the distributed deployment of synchronous designs (2006)
  13. Doucet, Frederic; Menarini, Massimiliano; Krüger, Ingolf H.; Gupta, Rajesh K.; Talpin, Jean-Pierre: A verification approach for GALS integration of synchronous components. (2006)
  14. Talpin, Jean-Pierre; Le Guernic, Paul: An algebraic theory for behavioral modeling and protocol synthesis in system design (2006)
  15. Talpin, Jean-Pierre; Guernic, Paul Le; Shukla, Sandeep Kumar; Gupta, Rajesh: A compositional behavioral modeling framework for embedded system design and conformance checking (2005)
  16. Benveniste, Albert; Caillaud, Beno{^ı}t; Carloni, Luca P.; Caspi, Paul; Sangiovanni-Vincentelli, Alberto L.: Causality and scheduling constraints in heterogeneous reactive systems modeling (2004)
  17. Talpin, Jean-Pierre; Le Guernic, Paul; Shukla, Sandeep Kumar; Doucet, Frédéric; Gupta, Rajesh: Formal refinement checking in a system-level design methodology (2004)

Further publications can be found at: http://www.irisa.fr/espresso/polychrony/publications.php