TimberWolf

The TimberWolf placement and routing package. TimberWolf is an integrated set of placement and routing optimization programs. The general combinatorial optimization technique known as simulated annealing is used by each program. Programs for standard cell, macro/custom cell, and gate-array placement, as well as standard cell global routing, have been developed. Experimental results on industrial circuits show that area savings over existing layout programs ranging from 15 to 62% are possible.


References in zbMATH (referenced in 17 articles )

Showing results 1 to 17 of 17.
Sorted by year (citations)

  1. Samanta, Radhamanjari; Erzin, Adil I.; Raha, Soumyendu; Shamardin, Yuriy V.; Takhonov, Ivan I.; Zalyubovskiy, Vyacheslav V.: A provably tight delay-driven concurrently congestion mitigating global routing algorithm (2015)
  2. Anand, S.; Saravanasankar, S.; Subbaraj, P.: Customized simulated annealing based decision algorithms for combinatorial optimization in VLSI floorplanning problem (2012)
  3. Farooq, Umer; Parvez, Husain; Mehrez, Habib; Marrakchi, Zied: Exploration of heterogeneous FPGA architectures (2011) ioport
  4. Abboud, Nadine; Grötschel, Martin; Koch, Thorsten: Mathematical methods for physical layout of printed circuit boards: an overview (2008)
  5. Zhou, Dian; Li, Rui-Ming: Design and verification of high-speed VLSI physical design (2005) ioport
  6. de Vicente, Juan; Lanchares, Juan; Hermida, Román: Placement by thermodynamic simulated annealing (2003)
  7. Albrecht, A.; Cheung, S.K.; Leung, K.S.; Wong, C.K.: Computing elastic moduli of two-dimensional random networks of rigid and nonrigid bonds by simulated annealing (1997)
  8. Albrecht, A.; Cheung, S.K.; Leung, K.S.; Wong, C.K.: Stochastic simulations of two-dimensional composite packings (1997)
  9. Abramson, David; Dang, Henry; Krishnamoorthy, Mohan: A comparison of two methods for solving 0-1 integer programs using a general purpose simulated annealing algorithm (1996)
  10. Duncan, Philip; Kindsfater, Ken; Liu, Lynette; Jain, Rajeev: Strategies for design automation of high speed digital filters. (1995) ioport
  11. Boese, Kenneth D.; Kahng, Andrew B.: Best-so-far vs. where-you-are: Implications for optimal finite-time annealing (1994)
  12. Cong, Jason; Preas, Bryan: A new algorithm for standard cell global routing (1992)
  13. Lutfiyya, Hanan; McMillin, Bruce; Poshyanonda, Pipatpong; Dagli, Cihan: Composite stock cutting through simulated annealing (1992)
  14. Cheh, Kah Mun; Goldberg, Jeffrey B.; Askin, Ronald G.: A note on the effect of neighborhood structure in simulated annealing (1991)
  15. Sorkin, Gregory B.: Efficient simulated annealing on fractal energy landscapes (1991)
  16. Strenski, Philip N.; Kirkpatrick, Scott: Analysis of finite length annealing schedules (1991)
  17. Wong, D.F.; Liu, C.L.: Floorplan design of VLSI circuits (1989)