Stateflow® is an environment for modeling and simulating combinatorial and sequential decision logic based on state machines and flow charts. Stateflow lets you combine graphical and tabular representations, including state transition diagrams, flow charts, state transition tables, and truth tables, to model how your system reacts to events, time-based conditions, and external input signals. With Stateflow you can design logic for supervisory control, task scheduling, and fault management applications. Stateflow includes state machine animation and static and run-time checks for testing design consistency and completeness before implementation.

References in zbMATH (referenced in 28 articles )

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  1. Aguado, Joaquín; Mendler, Michael; von Hanxleden, Reinhard; Fuhrmann, Insa: Denotational fixed-point semantics for constructive scheduling of synchronous concurrency (2015)
  2. Nardone, Roberto; Gentile, Ugo; Peron, Adriano; Benerecetti, Massimo; Vittorini, Valeria; Marrone, Stefano; De Guglielmo, Renato; Mazzocca, Nicola; Velardi, Luigi: Dynamic state machines for formalizing railway control system specifications (2015)
  3. Zou, Liang; Zhan, Naijun; Wang, Shuling; Fränzle, Martin: Formal verification of Simulink/Stateflow diagrams (2015)
  4. Åström, Karl J.; Kumar, P.R.: Control: a perspective (2014)
  5. Miyazawa, Alvaro; Cavalcanti, Ana: Refinement-based verification of implementations of Stateflow charts (2014)
  6. Eshuis, Rik: Statechartable Petri nets (2013)
  7. Ferrari, Alessio; Fantechi, Alessandro; Magnani, Gianluca; Grasso, Daniele; Tempestini, Matteo: The Metr^o Rio case study (2013)
  8. Zuliani, Paolo; Platzer, André; Clarke, Edmund M.: Bayesian statistical model checking with application to Stateflow/Simulink verification (2013)
  9. Bae, Kyungmin; Ölveczky, Peter Csaba; Feng, Thomas Huining; Lee, Edward A.; Tripakis, Stavros: Verifying hierarchical Ptolemy II discrete-event models using real-time maude (2012)
  10. Barnat, Jiri; Beran, Jan; Brim, Lubos; Kratochvíla, Tomas; Ročkai, Petr: Tool chain to support automated formal verification of avionics simulink designs (2012)
  11. Miyazawa, Alvaro; Cavalcanti, Ana: Refinement-oriented models of Stateflow charts (2012)
  12. Annpureddy, Yashwanth; Liu, Che; Fainekos, Georgios; Sankaranarayanan, Sriram: S-TaLiRo: a tool for temporal logic falsification for hybrid systems (2011)
  13. Navarro-López, Eva M.; Carter, Rebekah: Hybrid automata: an insight into the discrete abstraction of discontinuous systems (2011)
  14. Cavalcanti, Ana: Stateflow diagrams in Circus (2009)
  15. Eshuis, Rik: Reconciling statechart semantics (2009)
  16. Jackson, Ethan; Sztipanovits, Janos: Formalizing the structural semantics of domain-specific modeling languages (2009)
  17. Kanade, Aditya; Alur, Rajeev; Ivančić, Franjo; Ramesh, S.; Sankaranarayanan, Sriram; Shashidhar, K.C.: Generating and analyzing symbolic traces of Simulink/Stateflow models (2009)
  18. Ray, Sandip; Hunt, Warren A.jun.; Matthews, John; Moore, J.Strother: A mechanical analysis of program verification strategies (2008)
  19. Cleaveland, Rance: An instrumentation-based approach to controller validation (2007)
  20. Gran, Richard J.: Numerical computing with Simulink. Vol. I: Creating simulations. (2007)

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