Xilinx system generator and Xilinx Tool Kit. Programmable devices are at the heart of most systems today, enabling not only programmable logic design, but programmable systems integration. Xilinx has transformed from an FPGA company to an ‘All Programmable’ company, offering technology from logic and I/O to software programmable ARM® processing systems and beyond. Xilinx offers development tools that support programmable platforms requiring aggressive pace and the need for enhanced productivity. From the revolutionary Vivado® Design Suite to All Programmable Abstractions - Xilinx, along with its ecosystem of Alliance Members, are providing development tools that are defining the next generation of design.

References in zbMATH (referenced in 86 articles )

Showing results 1 to 20 of 86.
Sorted by year (citations)

1 2 3 4 5 next

  1. Hartley, Edward N.; Maciejowski, Jan M.: Field programmable gate array based predictive control system for spacecraft rendezvous in elliptical orbits (2015)
  2. Maleki, Mohammad; Ahmadi, Arash; Makki, Seyed; Soleimani, Hamid; Bavandpour, Mohammad: Networked adaptive non-linear oscillators: a digital synthesis and application (2015) ioport
  3. Sarkar, Surjadeep; Maulik, Ujjwal; Biswas, Baidyanath: Performance of a new split digital phase lock loop in additive wideband Gaussian noise (2013)
  4. Abdulla, K.P.; Azeem, Mohammad Fazle: A novel programmable CMOS fuzzifiers using voltage-to-current converter circuit (2012) ioport
  5. Chen, Dongdong; Ko, Seok-Bum: A novel decimal logarithmic converter based on first-order polynomial approximation (2012)
  6. Davidson, Tom; Abouelella, Fatma; Bruneel, Karel; Stroobandt, Dirk: Dynamic circuit specialisation for key-based encryption algorithms and DNA alignment (2012) ioport
  7. Lopes, Alba Sandyra Bezerra; Silva, Ivan Saraiva; Agostini, Luciano Volcan: A memory hierarchy model based on data reuse for full-search motion estimation on high-definition digital videos (2012) ioport
  8. Saldaña, Manuel; Patel, Arun; Liu, Hao Jun; Chow, Paul: Using partial reconfiguration and message passing to enable FPGA-based generic computing platforms (2012) ioport
  9. Sander, Oliver; Glas, Benjamin; Braun, Lars; Müller-Glaser, Klaus D.; Becker, Jürgen: Exploration of uninitialized configuration memory space for intrinsic identification of Xilinx Virtex-5 FPGA devices (2012) ioport
  10. Sepúlveda, Roberto; Montiel-Ross, Oscar; Quiñones-Rivera, Jorge; Quiroz, Ernesto E.: WLAN cell handoff latency abatement using an FPGA fuzzy logic algorithm implementation (2012) ioport
  11. Spacey, Simon; Luk, Wayne; Kelly, Paul H.J.; Kuhn, Daniel: Improving communication latency with the write-only architecture (2012) ioport
  12. Starke, Christoph; Grossmann, Vasco; Wienbrandt, Lars; Koschnicke, Sven; Carstens, John; Schimmler, Manfred: Optimizing investment strategies with the reconfigurable hardware platform RIVYERA (2012) ioport
  13. Subudhi, Bidyadhar; Ogeti, Pedda Suresh: Sliding mode approach to torque and pitch control for an wind energy system using FPGA (2012)
  14. Thomas, Alexander; Rückauer, Michael; Becker, Jürgen: HoneyComb: an application-driven online adaptive reconfigurable hardware architecture (2012) ioport
  15. Wernsing, John R.; Stitt, Greg: Elastic computing: A portable optimization framework for hybrid computers (2012) ioport
  16. Bahoura, Mohammed; Ezzaidi, Hassan: FPGA-implementation of parallel and sequential architectures for adaptive noise cancelation (2011) ioport
  17. Barkalov, A.A.; Titarenko, L.A.: Code conversion in compositional microprogram control units (2011) ioport
  18. Bassiri, Maisam Mansub; Shahhoseini, Hadi Shahriar: Configuration reusing in on-line task scheduling for reconfigurable computing systems (2011) ioport
  19. Corr^ea, Marcel M.; Schoenknecht, Mateus T.; Dornelles, Robson S.; Agostini, Luciano V.: A high-throughput hardware architecture for the H.264/AVC half-pixel motion estimation targeting high-definition videos (2011) ioport
  20. Glas, Benjamin; Sander, Oliver; Stuckert, Vitali; Müller-Glaser, Klaus D.; Becker, Jürgen: Prime field ECDSA signature processing for reconfigurable embedded systems (2011) ioport

1 2 3 4 5 next