The smallest ARIA module with 16-bit architecture. This paper presented the smallest hardware architecture of the ARIA block cipher algorithm. A 128-bit data block was divided into eight 16-bit blocks to reduce the hardware size. The 16-bit architecture allowed two S-Boxes and 16-bit diffusion operation. We proposed a design for the substitution layer and the memory block. The proposed round key generator processed a 16-bit block of a 128-bit round key for three cycles. The proposed ARIA module with a 128-bit key comprised 6,076 equivalent gates using a $0.18-mu $m CMOS standard cell library. It took 88 clock cycles to generate four initial values for a round key and 400 clock cycles to en/decrypt 128-bit block data. The power consumption of 16-bit ARIA was only $5.02 mu $W at 100 kHz 1.8V.

References in zbMATH (referenced in 14 articles , 1 standard article )

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  1. Sasaki, Yu; Todo, Yosuke: New impossible differential search tool from design and cryptanalysis aspects. Revealing structural properties of several ciphers (2017)
  2. Shen, Xuan; Liu, Guoqiang; Sun, Bing; Li, Chao: Impossible differentials of SPN ciphers (2017)
  3. Derbez, Patrick; Fouque, Pierre-Alain: Automatic search of meet-in-the-middle and impossible differential attacks (2016)
  4. Dinu, Daniel; Perrin, Léo; Udovenko, Aleksei; Velichkov, Vesselin; Großschädl, Johann; Biryukov, Alex: Design strategies for ARX with provable bounds: sparx and LAX (2016)
  5. Guo, Zhiyuan; Wu, Wenling; Gao, Si: Constructing lightweight optimal diffusion primitives with Feistel structure (2016)
  6. Sun, Bing; Liu, Zhiqiang; Rijmen, Vincent; Li, Ruilin; Cheng, Lei; Wang, Qingju; Alkhzaimi, Hoda; Li, Chao: Links among impossible differential, integral and zero correlation linear cryptanalysis (2015)
  7. Wu, Wenling; Zhang, Lei; Yu, Xiaoli: The DBlock family of block ciphers (2015)
  8. Huang, Jialin; Lai, Xuejia: What is the effective key length for a block cipher: an attack on every practical block cipher (2014)
  9. Nikova, Svetla; Rijmen, Vincent; Schläffer, Martin: Secure hardware implementation of non-linear functions in the presence of glitches (2009)
  10. Li, Wei; Gu, Dawu; Li, Juanru: Differential fault analysis on the ARIA algorithm (2008) ioport
  11. Wu, Wen-Ling; Zhang, Wen-Tao; Feng, Deng-Guo: Impossible differential cryptanalysis of reduced-round ARIA and Camellia (2007) ioport
  12. Yang, Sangwoon; Park, Jinsub; You, Younggap: The smallest ARIA module with 16-bit architecture (2006)
  13. Cho, Hong-Su; Sung, Soo Hak; Kwon, Daesung; Lee, Jung-Keun; Song, Jung Hwan; Lim, Jongin: New method for bounding the maximum differential probability for SPNs and ARIA (2005)
  14. Kwon, Daesung; Kim, Jaesung; Park, Sangwoo; Sung, Soo Hak; Sohn, Yaekwon; Song, Jung Hwan; Yeom, Yongjin; Yoon, E-Joong; Lee, Sangjin; Lee, Jaewon; Chee, Seongtaek; Han, Daewan; Hong, Jin: New block cipher: ARIA (2004)