ADVIS

ADVIS: A Software Package for the Design of Systolic Arrays. A methodology for mapping numerical algorithms into systolic arrays is presented in this paper. This mapping is done using a transformation function which transforms the original sequential algorithm into a suitable parallel form. A program was developed to automatically generate this transformation. We consider both the case of arbitrarily large systolic arrays as well as the more realistic case of fixed-size systolic arrays requiring algorithm partitioning. An example of the algorithm is given to present the methodology and the results obtained with the program.


References in zbMATH (referenced in 11 articles )

Showing results 1 to 11 of 11.
Sorted by year (citations)

  1. Alexandrov, V. N.; Megson, G. M.: Parallel algorithms for knapsack type problems (1999)
  2. Wichmann, Friedrich: Systolic parallelization of programs by combining loop boxes (1997)
  3. Yeh, Jinn Wang; Cheng, Wen Jiunn; Jen, Chein Wei: VASS - a VLSI array system synthesizer. (1996) ioport
  4. Zimmermann, Karl Heinz: Linear mappings of (n)-dimensional uniform recurrences onto (k)-dimensional systolic arrays. (1996) ioport
  5. Kuchibhotla, Prashanth; Rao, Bhaskar D.: A methodology for fast scheduling of partitioned systolic algorithms. (1995) ioport
  6. Schoenfeld, Mirjam; Franzen, Jens; Schwiegershausen, Markus; Pirsch, Peter: The LISA design environment for the synthesis of array processors including memories for the data transfer and faut tolerance by reconfiguration and coding techniques. (1995) ioport
  7. Xue, Jingling: Closed-form mapping conditions for the synthesis of linear processor arrays. (1995) ioport
  8. Lengauer, Christian; Barnett, Michael; Hudson, Duncan G.: Towards systolizing compilation (1991)
  9. Bojanczyk, Adam W.: Some complexity results in parallel matrix-based signal processing (1990)
  10. Lee, Peizong; Kedem, Zvi Meir: Synthesizing linear array algorithms from nested for loop algorithms (1988)
  11. Moldovan, Dan I.: ADVIS: A software package for the design of systolic arrays. (1987) ioport