STAMP: Stanford Transactional Applications for Multi-Processing. Transactional Memory (TM) is emerging as a promising technology to simplify parallel programming. While several TM systems have been proposed in the research literature, we are still missing the tools and workloads necessary to analyze and compare the proposals. Most TM systems have been evaluated using microbenchmarks, which may not be representative of any real-world behavior, or individual applications, which do not stress a wide range of execution scenarios. We introduce the Stanford Transactional Application for Multi-Processing (STAMP), a comprehensive benchmark suite for evaluating TM systems. STAMP includes eight applications and thirty variants of input parameters and data sets in order to represent several application domains and cover a wide range of transactional execution cases (frequent or rare use of transactions, large or small transactions, high or low contention, etc.). Moreover, STAMP is portable across many types of TM systems, including hardware, software, and hybrid systems. In this paper, we provide descriptions and a detailed characterization of the applications in STAMP. We also use the suite to evaluate six different TM systems, identify their shortcomings, and motivate further research on their performance characteristics.

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  1. Rosales Marticorena, Francisco: Empirical Bayesian smoothing splines for signals with correlated errors: methods and applications (2016)
  2. Didona, Diego; Felber, Pascal; Harmanci, Derin; Romano, Paolo; Schenker, Jörg: Identifying the optimal level of parallelism in transactional memory applications (2015) ioport
  3. Pankratius, Victor; Adl-Tabatabai, Ali-Reza: Software engineering with transactional memory versus locks in practice (2014) ioport
  4. Baldassin, Alexandro; Goldstein, Felipe; Azevedo, Rodolfo: A transactional runtime system for the Cell/BE architecture (2012) ioport
  5. Heber, Tomer; Hendler, Danny; Suissa, Adi: On the impact of serializing contention management on STM performance (2012) ioport
  6. Sharma, Gokarna; Busch, Costas: A competitive analysis for balanced transactional memory workloads (2012)
  7. Sharma, Gokarna; Busch, Costas: Window-based greedy contention management for transactional memory: theory and practice (2012)
  8. Shriraman, Arrvindh; Dwarkadas, Sandhya: Analyzing conflicts in hardware-supported memory transactions (2011) ioport
  9. Ferri, Cesare; Wood, Samantha; Moreshet, Tali; Bahar, R.Iris; Herlihy, Maurice: Embedded-TM: energy and complexity-effective hardware transactional memory for embedded multicore systems (2010)
  10. Harmanci, Derin; Gramoli, Vincent; Felber, Pascal; Fetzer, Christof: Extensible transactional memory testbed (2010)
  11. Usui, Takayuki; Behrends, Reimer; Evans, Jacob; Smaragdakis, Yannis: Adaptive locks: combining transactions and locks for efficient concurrency (2010)
  12. Heindl, Armin; Pokam, Gilles: An analytic framework for performance modeling of software transactional memory (2009)
  13. Tian, Chen; Feng, Min; Nagarajan, Vijay; Gupta, Rajiv: Speculative parallelization of sequential loops on multicores (2009)