DynTile: Parametric tiled loop generation for parallel execution on multicore processors. Loop tiling is an important compiler transformation used for enhancing data locality and exploiting coarse-grained parallelism. Tiled codes in which tile sizes are runtime parameters - called parametrically-tiled codes - are important for empirical tuning systems like ATLAS. Some recent work has addressed the problem of generating sequential parametric tiled code. In this paper we describe DynTile, a system for transforming untiled sequential input C code containing affine imperfectly nested loops to parametrically tiled code for parallel execution on multicore processors. The effectiveness of the system is demonstrated using a number of benchmarks on an eight-core system
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References in zbMATH (referenced in 3 articles )
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- Bakhanovich, S. V.; Sobolevskii, P. I.: Parametrized tiling: accurate approximations and analysis of global dependences (2014)
- Likhoded, N. A.: Sufficient conditions for the determination and use of data in the same granular parallel computation process (2014)
- Kalinnik, Natalia; Korch, Matthias; Rauber, Thomas: An efficient time-step-based self-adaptive algorithm for predictor-corrector methods of Runge-Kutta type (2011)