ModelSim

Mentor Graphics was the first to combine single kernel simulator (SKS) technology with a unified debug environment for Verilog, VHDL, and SystemC. The combination of industry-leading, native SKS performance with the best integrated debug and analysis environment make ModelSim® the simulator of choice for both ASIC and FPGA designs. The best standards and platform support in the industry make it easy to adopt in the majority of process and tool flows.


References in zbMATH (referenced in 18 articles )

Showing results 1 to 18 of 18.
Sorted by year (citations)

  1. Kung, Ying-Shieh; Thanh, Nguyen Phan; Wang, Ming-Shyng: Design and simulation of a sensorless permanent magnet synchronous motor drive with microprocessor-based PI controller and dedicated hardware EKF estimator (2015)
  2. Bibilo, P. N.: Minimization of binary decision diagrams for systems of incompletely defined Boolean functions (2013)
  3. Chou, Hsin-Hung; Kung, Ying-Shieh; Vu Quynh, Nguyen; Cheng, Stone: Optimized FPGA design, verification and implementation of a neuro-fuzzy controller for PMSM drives (2013)
  4. Dixit, Arati M.; Singh, Harpreet: A soft computing approach to crack detection and impact source identification with field-programmable gate array implementation (2013) ioport
  5. Kung, Ying-Shieh; Quynh, Nguyen Vu; Hieu, Nguyen Trung; Lin, Jin-Mu: FPGA realization of sensorless PMSM speed controller based on extended Kalman filter (2013) ioport
  6. Juang, Ying-Shen; Ko, Lu-Ting; Chen, Jwu-E.; Sung, Tze-Yun; Hsin, Hsi-Chin: Optimization and implementation of scaling-free CORDIC-based direct digital frequency synthesizer for body care area network systems (2012)
  7. Ko, Lu-Ting; Chen, Jwu-E; Hsin, Hsi-Chin; Shieh, Yaw-Shih; Sung, Tze-Yun: A unified algorithm for subband-based discrete cosine transform (2012)
  8. Bibilo, P. N.; Leonczyk, P. V.: Decomposition of systems of Boolean functions determined by binary decision diagrams (2011)
  9. Lagadec, Loïc; Picard, Damien; Corre, Youenn; Lucas, Pierre-Yves: Experiment centric teaching for reconfigurable processors (2011) ioport
  10. Devaux, Ludovic; Ben Sassi, Sana; Pillement, Sebastien; Chillet, Daniel; Demigny, Didier: Flexible interconnection network for dynamically and partially reconfigurable architectures (2010) ioport
  11. Lee, Choonseung; Kim, Sungchan; Ha, Soonhoi: A systematic design space exploration of mpsoc based on synchronous data flow specification (2010) ioport
  12. Kornecki, Andrew; Zalewski, Janusz: Certification of software for real-time safety-critical systems: state of the art (2009) ioport
  13. Picard, Damien; Lagadec, Loic: Multilevel simulation of heterogeneous reconfigurable platforms (2009) ioport
  14. Pohl, Christopher; Paiz, Carlos; Porrmann, Mario: Vmagic-automatic code generation for VHDL (2009) ioport
  15. Saldaña, Manuel; Ramalho, Emanuel; Chow, Paul: A message-passing hardware/software cosimulation environment for reconfigurable computing systems (2009) ioport
  16. Ditmar, Johan; Mckeever, Steve; Wilson, Alex: Area optimisation for field-programmable gate arrays in systemc hardware compilation (2008) ioport
  17. Bibilo, P. N.; Romanov, V. I.: Application of productions for automatic control of logical design of discrete devices (2007)
  18. Araújo, Guido; Barros, Edna; Melcher, Elmar; Azevedo, Rodolfo; Silva, Karina R. G.da; Prado, Bruno; Lima, Manoel E.de: A systemC-only design methodology and the CINE-IP multimedia platform (2006) ioport