References in zbMATH (referenced in 58 articles )

Showing results 1 to 20 of 58.
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  1. Azizi-Sultan, Ahmad-Saher: Constrained pseudo-propositional logic (2020)
  2. Bloem, Roderick; Jacobs, Swen; Vizel, Yakir: Efficient information-flow verification under speculative execution (2019)
  3. Biere, Armin; Kröning, Daniel: SAT-based model checking (2018)
  4. Chen, Wenxiang; Whitley, Darrell: Decomposing SAT instances with pseudo backbones (2017)
  5. Gaspers, Serge; Ordyniak, Sebastian; Ramanujan, M. S.; Saurabh, Saket; Szeider, Stefan: Backdoors to q-Horn (2016)
  6. Inala, Jeevana Priya; Singh, Rohit; Solar-Lezama, Armando: Synthesis of domain specific CNF encoders for bit-vector solvers (2016)
  7. Velev, Miroslav: Formal verification of microprocessors. Automatic and scalable methods for pipelined, superscalar, and VLIW designs. (to appear) (2015) ioport
  8. Velev, Miroslav N. (ed.); Franco, John (ed.): Application of constraints to formal verification and artificial intelligence (2014)
  9. Audemard, Gilles; Lagniez, Jean-Marie; Simon, Laurent: Improving Glucose for incremental SAT solving with assumptions: application to MUS extraction (2013)
  10. Gaspers, Serge; Szeider, Stefan: Backdoors to satisfaction (2012)
  11. Katebi, Hadi; Sakallah, Karem A.; Markov, Igor L.: Conflict anticipation in the search for graph automorphisms (2012)
  12. Abed, Sa’ed; Mokhtari, Yassine; Ait-Mohamed, Otmane; Tahar, Sofiène: NuMDG: a new tool for multiway decision graphs construction (2011)
  13. Katebi, Hadi; Sakallah, Karem A.; Marques-Silva, João P.: Empirical study of the anatomy of modern SAT solvers (2011)
  14. Sakallah, Karem A.; Marques-Silva, Joao: Anatomy and empirical evaluation of modern SAT solvers (2011)
  15. Velev, Miroslav N.; Gao, Ping: Exploiting abstraction for efficient formal verification of DSPs with arrays of reconfigurable functional units (2011) ioport
  16. Schulz, Sven; Blochinger, Wolfgang: Parallel SAT solving on peer-to-peer desktop grids (2010) ioport
  17. Srinivasan, Sudarshan K.: Optimization techniques for verification of out-of-order execution machines (2010) ioport
  18. Velev, Miroslav N.; Gao, Ping: Method for formal verification of soft-error tolerance mechanisms in pipelined microprocessors (2010) ioport
  19. Aloul, Fadi A.; Ramani, Arathi; Markov, Igor L.; Sakallah, Karem A.: Dynamic symmetry-breaking for Boolean satisfiability (2009)
  20. Sabharwal, Ashish: \textttSymChaff: Exploiting symmetry in a structure-aware satisfiability solver (2009)

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Further publications can be found at: http://www.miroslav-velev.com/list_SAT_papers.html