SyReC: a programming language for synthesis of reversible circuits. Reversible logic serves as a basis for emerging technologies like quantum computing and additionally has applications in low-power design. In particular, since conventional technologies like CMOS are going to reach their limits in the near future, reversible logic has been established as a promising alternative. Thus, in the last years this area started to become intensely studied by researchers. In particular, how to efficiently synthesize complex reversible circuits is an important question. So far, only synthesis approaches are available that rely on Boolean function representations, like e.g., truth tables or decision diagrams. In this chapter, we propose the programming language SyReC that allows to specify and afterwards to automatically synthesize reversible circuits. Using an existing programming language for reversible software design as basis, we introduce new concepts, operations, and restrictions allowing the specification of reversible hardware. Furthermore, a hierarchical approach is presented that automatically transforms the respective statements and operations of the new programming language into a reversible circuit. Experiments show that with the proposed method, complex circuits can be easily specified and synthesized while with previous approaches this often is not possible due to the limits caused by truth tables or decision diagrams.
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References in zbMATH (referenced in 5 articles )
Showing results 1 to 5 of 5.
- Parent, Alex; Roetteler, Martin; Svore, Krysta M.: REVS: a tool for space-optimized reversible circuit synthesis (2017)
- Valiron, Benoît: Generating reversible circuits from higher-order functional programs (2016)
- Yokoyama, Tetsuo; Axelsen, Holger Bock; Glück, Robert: Fundamentals of reversible flowchart languages (2016)
- Wille, Robert; Lye, Aaron; Drechsler, Rolf: Considering nearest neighbor constraints of quantum circuits at the reversible circuit level (2014)
- Thomsen, Michael Kirkedal: Describing and optimising reversible logic using a functional language (2012)