This paper examines a set of commercially representative embedded programs and compares them to an existing benchmark suite, SPEC2000. A new version of SimpleScalar that has been adapted to the ARM instruction set is used to characterize the performance of the benchmarks using configurations similar to current and next generation embedded processors. Several characteristics distinguish the representative embedded programs from the existing SPEC benchmarks including instruction distribution, memory behavior, and available parallelism. The embedded benchmarks, called MiBench, are freely available to all researchers.

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  1. Shafiei, Niloufar: Non-blocking Patricia tries with replace operations (2019)
  2. Tan, Jiaqi; Tay, Hui Jun; Gandhi, Rajeev; Narasimhan, Priya: AUSPICE-R: automatic safety-property proofs for realistic features in machine code (2016)
  3. Wang, Guohui; Guan, Yong; Wang, Yi; Shao, Zili: Energy-aware assignment and scheduling for hybrid main memory in embedded systems (2016)
  4. Zhang, Biying; Fu, Zhongchuan; Chen, Hongsong; Cui, Gang: Probabilistic analysis of steady-state temperature and maximum frequency of multicore processors considering workload variation (2016)
  5. Shobaki, Ghassan; Jamal, Jafar: An exact algorithm for the sequential ordering problem and its application to switching energy minimization in compilers (2015)
  6. Chen, Xuhao; Shen, Li; Wang, Zhiying; Zheng, Zhong; Chen, Wei: Binary compatibility for embedded systems using greedy subgraph mapping (2014) ioport
  7. Botinčan, Matko; Babić, Domagoj: Sigma(^*), symbolic learning of input-output specifications (2013)
  8. Chase, Michael; Malik, Abid M.; Russell, Tyrel; Oldford, R. Wayne; van Beek, Peter: A computational study of heuristic and exact techniques for superblock instruction scheduling (2012) ioport
  9. Gutin, G.; Johnstone, A.; Reddington, J.; Scott, E.; Yeo, A.: An algorithm for finding input-output constrained convex sets in an acyclic digraph (2012)
  10. Liang, Yun; Rupnow, Kyle; Li, Yinan; Min, Dongbo; Do, Minh N.; Chen, Deming: High-level synthesis: productivity, performance, and software constraints (2012) ioport
  11. Nagpal, Rahul; Srikant, Y. N.: Compiler-assisted energy optimization for clustered VLIW processors (2012) ioport
  12. Spacey, Simon; Luk, Wayne; Kelly, Paul H. J.; Kuhn, Daniel: Improving communication latency with the write-only architecture (2012) ioport
  13. Fursin, Grigori; Kashnikov, Yuriy; Memon, Abdul Wahid; Chamski, Zbigniew; Temam, Olivier; Namolaru, Mircea; Yom-Tov, Elad; Mendelson, Bilha; Zaks, Ayal; Courtois, Eric; Bodin, Francois; Barnard, Phil; Ashton, Elton; Bonilla, Edwin; Thomson, John; Williams, Christopher K. I.; O’Boyle, Michael: Milepost GCC: Machine learning enabled self-tuning compiler (2011) ioport
  14. Kim, Hyunhee; Kim, Jihong: A leakage-aware L2 cache management technique for producer-consumer sharing in low-power chip multiprocessors (2011) ioport
  15. Nagpal, Rahul; Srikant, Y. N.: Compiler-assisted power optimization for clustered VLIW architectures (2011) ioport
  16. Pereira, Monica Magalhães; Carro, Luigi: Dynamic reconfigurable computing: the alternative to homogeneous multicores under massive defect rates (2011) ioport
  17. Rutzig, Mateus B.; Beck, Antonio C. S.; Madruga, Felipe; Alves, Marco A.; Freitas, Henrique C.; Maillard, Nicolas; Navaux, Philippe O. A.; Carro, Luigi: Boosting parallel applications performance on applying DIM technique in a multiprocessing environment (2011) ioport
  18. Silva-Filho, Abel G.; Cordeiro, Filipe R.; Araújo, Cristiano C.; Sarmento, Adriano; Gomes, Millena; Barros, Edna; Lima, Manoel E.: An ESL approach for energy consumption analysis of cache memories in soc platforms (2011) ioport
  19. Aouad, Maha Idrissi; Schott, René; Zendra, Olivier: Hybrid heuristics for optimizing energy consumption in embedded systems (2010)
  20. Chiu, Jih-Ching; Yang, Kai-Ming: A novel instruction stream buffer for VLIW architectures (2010)

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