STMBench7: a benchmark for software transactional memory. Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse-grained locking and easier to use than fine-grained locking. However, STM implementations have yet to demonstrate that their runtime overheads are acceptable. To date, empiric evaluations of these implementations have suffered from the lack of realistic benchmarks. Measuring performance of an STM in an overly simplified setting can be at best uninformative and at worst misleading as it may steer researchers to try to optimize irrelevant aspects of their implementations. This paper presents STMBench7: a candidate benchmark for evaluating STM implementations. The underlying data structure consists of a set of graphs and indexes intended to be suggestive of many complex applications, e.g., CAD/CAM. A collection of operations is supported to model a wide range of workloads and concurrency patterns. Companion locking strategies serve as a baseline for STM performance comparisons. STMBench7 strives for simplicity. Users may choose a workload, number of threads, benchmark length, as well as the possibility of structure modification and the nature of traversals of shared data structures. We illustrate the use of STMBench7 with an evaluation of a well-known software transactional memory implementation

This software is also peer reviewed by journal TOMS.

References in zbMATH (referenced in 9 articles )

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  1. Pankratius, Victor; Adl-Tabatabai, Ali-Reza: Software engineering with transactional memory versus locks in practice (2014) ioport
  2. Attiya, Hagit; Milani, Alessia: Transactional scheduling for read-dominated workloads (2012)
  3. Heber, Tomer; Hendler, Danny; Suissa, Adi: On the impact of serializing contention management on STM performance (2012) ioport
  4. Sharma, Gokarna; Busch, Costas: A competitive analysis for balanced transactional memory workloads (2012)
  5. Sharma, Gokarna; Busch, Costas: Window-based greedy contention management for transactional memory: theory and practice (2012)
  6. Perelman, Dmitri; Byshevsky, Anton; Litmanovich, Oleg; Keidar, Idit: SMV: selective multi-versioning STM (2011)
  7. Shriraman, Arrvindh; Dwarkadas, Sandhya: Analyzing conflicts in hardware-supported memory transactions (2011) ioport
  8. Harmanci, Derin; Gramoli, Vincent; Felber, Pascal; Fetzer, Christof: Extensible transactional memory testbed (2010)
  9. Shriraman, Arrvindh; Dwarkadas, Sandhya; Scott, Michael L.: Implementation tradeoffs in the design of flexible transactional memory support (2010)